For the past year, I've been immersed in research on server microprocessor and system architectures. There have been genuine breakthroughs on so many fronts. IBM's POWER6 is built around 4.7 GHz processor cores that outpace the latest Itanium in single-core performance, while advancing POWER simultaneously toward power efficiency and mainframe functionality. POWER6 is able to adjust the power utilization of CPU and core sub-components with each clock cycle, and it does so based on its own analysis of computing and I/O load rather than the operating system's. Sun's UltraSPARC T2 proves that by focusing on total throughput, a one-socket server with a comparatively low clock speed can rival, and even outperform larger, more costly, more power hungry servers. IBM and Sun put the lie to notions about RISC having run its course.

I've never seen as much new, exciting and remarkable technology emerge from microprocessor chipmakers as I've seen in the past twelve months. I've never seen computing's goalposts moved so far in such a short span of time.

For most of a year, I've also been deep in learning about AMD's new server CPU architecture, Barcelona, which makes its debut today, 9/10/07, as quad-core Opteron. I've experienced Barcelona as PowerPoint decks, block diagrams, chip masks, and discussions with AMD's CTO, engineers and Fellows. Those technical discussions weren't accompanied by remarks about Intel. AMD was bearing down on AMD's best to date. I believe that I have as deep a conceptual understanding of Barcelona as any non-engineer outside AMD, and the more I learned, the more convinced I was that I was looking at a mind-blowing architecture. Barcelona's design goals overlapped concepts executed by Sun and IBM while keeping the architecture 100 percent compatible with legacy ("standardized") x86. I developed grand expectations for Barcelona, but AMD cautioned me not to expect too much in the way of trouncing Intel in benchmarks. AMD's marketing played down the reach of Barcelona's redesign, but this didn't line up with what AMD's engineers were teaching me.

I laid my hands on Barcelona for the first time just three days ago in the form of a two-socket server with a pair of 2 GHz quad-core Opterons, model 2350. The details of that system and the results of my early testing will follow very shortly, but where Sun and IBM had me saying, "wow", "that's remarkable; who dreamed this up?" I looked at the details of Barcelona, wondering where AMD could make its mark in a field already filled with such beautiful engineering.

Now, sitting on the floor in front of Barcelona (by remote control), I am speechless. I'm running all eight cores, full-out, and watching a watt/ammeter keep a record. The evening started with an all-night burn in. During that burn-in, with all cores kicking at 100 percent, I didn't expect when I saw: 2 amps, measured at the outlet, or just 300 watts. When the workload dropped to idle the power utilization came in at 1.3 amps, or 149 watts. I continued with the testing proper, which is not yet in a state that permits me to share the results, and verified those results.

This is not a wimpily-configured box: 8 GB Registered ECC DRAM, on-CPU I/O, memory and SMP node controllers. There are two banks of RAM for each socket, and as I'll explain when I get to the results, each socket's shared third-level cache turned out to be a major win.

After all the tech magic worked by AMD, it's the price that got my blood boiling: $389! That's desktop chip money. So AMD is blazing trails in more ways than one.

It's Barcelona day, week, month, and who knows how long after that. I'm jazzed.

Posted by Tom Yager on September 10, 2007 06:43 AM