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Ahead of the Curve | Tom Yager » TAG: AMD v Intel

May 21, 2008 | Comments: (0)

AMD's server roadmap burns through Intel's fog

Intel CEO Paul Otellini's memorable "shame on us... mea culpa, we screwed up" March 2007 speech to Morgan Stanley investors came after his company's marketing fog machine could no longer conceal the truth that, depending on your point of view, Intel was peddling technology that it knew to be somewhere between four and eight years behind AMD's. AMD told you so, and so did I, but Intel's marketing is capable of overpowering reason. Intel manages to thrive by setting expectations that match its technology, and raising those expectations every two years by just enough to make you see your Intel-based PC or server as wanting. Otellini got stuck apologizing because AMD got a chance to show buyers Opteron's potential. The market's expectations followed, as they naturally will when people buy technology that never needs replacing. Given the choice between buying well and buying often, the market chose the former.

Intel's smokescreen is back in overdrive. Those who do a light amount of homework before buying are getting Intel's same old message: Higher clock speeds, bigger cache, manufacturing process shrink, and faster front-side bus make the world go 'round. That latest speed bump makes your one year old computer look pretty sad (on paper). And when Intel goes "tock," it's rip and replace time to get those extra cores and the broader bus. Intel put the cherry on top by getting everyone worked up over CPU power draw to the exclusion of total system power draw. Intel sets the market's agenda. It tells buyers what matters.

AMD designs technology that will enable the workloads that you'll be running in two or three years. It strikes many as improbable when I tell them that AMD-based hardware, servers in particular, get faster over time as operating systems and application developers start unlocking the potential of the platform. When I say this, I may not take enough care to point out that AMD is committed to raising that potential between major revisions of its CPUs and whole system platforms. Intel can't catch up because AMD presents a moving target with meaningful point enhancements between major architecture revisions. AMD ticks and tocks as well, but it's the market that swings AMD's pendulum.

AMD is getting bolder about letting the market, in this case, IT, know that even through the gathering fog, AMD has a clear picture of what matters most to system buyers. You don't hear much about it these days, but price/performance matters. AMD's record-making results with Quad-Core Opteron on SPECweb2005 sets a realistic bar for server performance, a record that, notably, Intel misses by a hair. But Quad-Core Opteron comes in 41 percent lower in cost than quad-core Intel Xeon in two-socket servers. AMD servers cost less to build. Whether these savings will be passed on to you as a lower total system price is up to the OEM and its tendency to maintain artificial price parity between its similar Intel and AMD offerings. Not that I'm suggesting there's any pressure to do that.

AMD's not handing performance per watt to Intel. AMD's published benchmarks show quad-core AMD systems skunking Intel Core 2 Xeon on floating point synthetic benchmarks, by margins of between 13 and 50 percent, but quad-core Opteron lags Core 2 Xeon's integer performance by an impressive margin. Intel's butt-kicking compiler scored quad-core Xeon an earnest 20 percent lead over Quad-Core Opteron on SPECint_rate2006 (peak). The best AMD-targeted compiler from Portland Group couldn't close the gap. But interestingly, when the playing field was leveled a bit by using the gcc open source compilers, AMD pulled to within 9 percent of Core 2 Xeon on SPECint_rate2006 (base). The likelihood that you'll encounter architecture-optimized applications in the wild is mighty slim, but AMD gets candor points for showing this shortcoming of its own making. If AMD cares about closing the integer benchmark gap, AMD needs to contribute benchmark-winning optimizations to GNU.

AMD counters the gearhead-level speeds and feeds derived from synthetic benchmarks with IT-relevant load metrics. In Web transactions, virtualization, and parallel workloads, Quad-Core Opteron outperforms quad-core Xeon by margins of 9 to 16 percent. But there's a point worth noting: AMD scored these wins with a 2.3GHz CPU and 2MB of Level 3 cache. Intel lost out to AMD with quad-core Xeon CPUs running at 2.83GHz with 12MB of cache. The configuration differences between the two architectures give AMD what you call headroom. AMD is holding manufacturing process shrink, CPU clock speed, bigger cache, and additional cores as cards to play on IT's behalf when the time is right.

The time is right. Later this year, AMD will roll out "Shanghai," a Quad-Core Opteron built on a new 45 nanometer process, matching Intel's in scale while using a simpler method. Shanghai raises the ceiling on CPU clock speed to a level that AMD didn't disclose, and lowers power at idle by 20 percent. That's a ridiculous metric for a two-socket server, but in an eight-socket server, the likelihood that a socket will be idle is higher. AMD surprised me by borrowing a page from Intel's playbook, doubling its Level 3 CPU cache to 6MB. That will make a serious difference in the performance of applications optimized for Intel CPUs.

I was particularly struck by AMD's claim that Shanghai would deliver 25 percent faster times for world switch (switching from one guest OS instance to another) than the present Quad-Core Opteron. This, combined with a 10 percent boost in memory bandwidth, will give AMD a leg up in virtualization.

Shanghai marks the server debut of the coherent HyperTransport 3 (cHT3) bus. cHT3 is faster and more scalable than the HyperTransport 1 bus implemented in present Quad-Core Opteron servers, which probably contributes to reduced world switch time and increased memory bandwidth, both measures that are sensitive to the speed of the interconnects among CPUs.

The Shanghai CPU, which AMD projects will be available this year, will be a drop-in replacement for Quad-Core Opteron. Given where the economy is likely to be when Shanghai shows up, chip swap-upgradeable servers are a really smart investment.

I've saved the best part for last. If AMD hewed to Intel's "tick tock" strategy, which dictates a substantial architecture revision (tock) every other year, then with Shanghai, 2008 will certainly go down as an AMD "tock." In 2009, an architecture revision code-named "Istanbul" will carry AMD's 45 nanometer Opteron to six cores. In 2010, AMD will knock Intel's tocks off: A 12-core large scale enterprise CPU named "Magny-Cours" is slated for the first half of that year, and will deliver on AMD's big iron availability and reliability strategy. A 6-core edition of this CPU, "Sao Paolo," will roll out at the same time. I'm setting up a separate briefing for these parts, because believe me, they're game changers.

AMD is always cautious about projecting too far ahead, fearing that system buyers might suspect Intel-like obsolescence by design. AMD is smart to come out swinging by laying out present and future technology despite the risk, but amid the excitement over architectures to come, the value of AMD's long-term commitment to buyers can't be set aside. The Quad-Core Opteron server you buy today will upgrade to Six-Core, and even when 2010 comes around, 2008's Quad-Core Opteron servers will remain state of the art relative to Intel. New systems based on that platform will still be sold, and parts will remain plentiful. Isn't it nice to see clearly again?

Posted by Tom Yager on May 21, 2008 03:00 AM



March 26, 2008 | Comments: (0)

AMD's ready to scale you up

When it comes to scaling x86 servers, it's smarter to think inside the box

Architectural traits reaching back to Pentium remain present in the Intel-powered servers of today. The limitations of those servers aren't likely to be noticed as long as the routine of IT and commercial server buyers is to add capacity by scaling out, purchasing new two-socket servers. But the time will come when adding a rack server, or a rack of servers, is no longer the wise person's path to increased capacity. Smart planning will lead you to handle bigger workloads without more servers.

The terms "scale up" and "scale out" are sometimes unfamiliar to x86 buyers. They refer to the locale of capacity expansion, computing ("thinking") capacity in particular. A server that scales up can be made to handle substantially higher workloads through upgrades inside the chassis. These systems cost more at first, but they're designed to have untapped capabilities that you can turn on with an incremental investment far less than that of a new server.

Scale up is the factor that has kept proprietary Unix big iron in business. Linux on a commodity two-socket Intel server was supposed to push HP, IBM, and Sun out of business. It looks that way if you see a rack chassis as a rack chassis without regard for what's inside. But scale-up maximizes everything from power savings and server consolidation ratio to server longevity, with the bonus of lower long-term costs and higher availability. All AMD Opteron servers scale up. It's baked into the CPU, the bus, and the total system architecture. AMD's strategy is to make it possible to scale up any Opteron server for five years with only a CPU swap, no new server required. This stands in stark contrast to Intel's "tick tock" plan that attempts to nail IT to the stereotypical two-year purchasing cycle. Intel's two-year cycle of obsoleting chips makes parts scarce and expensive, so that if you do buy an Intel-based server with empty sockets with plans to scale it up, it's unlikely that CPUs precisely matching the models you have now will be available, and the availability of FB-DIMM memory at your existing Intel servers' speed may be rare as well. AMD's five-year plan is more in line with the way IBM treats, and retains, its customers.

Scale out means bigger racks, more servers, more heat, higher power and cooling costs, another tick on your service contract, another hand to hold in the middle of the night, and so on. The only thing going for it is convenience, and that's a powerful motivator. Most shops have the deployment of new rack servers down to a science, and there's rarely a need to even remove the cover on a server before you slide it into the rack. Opteron servers yield to the very same plug-and-play initial deployment, but in a few months when you'd ordinarily add a new server, you can take the scale-up route of your choice: Swap out your Opteron CPUs with higher speed or more cores, add RAM or use faster RAM, or fill empty CPU sockets with new CPUs. It really is as simple as it sounds, and when you (or your field service person) buttons up the case, you have a new server, or two, or two and a half, where your two-socket server used to be.

You have to adopt a long-term view to justify buying x86 servers that you can grow without filling more rack units, but the economy has a way of fast-forwarding reality such that the present suddenly laps the plan. If you're not already in spend-it-while-we-have-it mode, all forecasts indicate that you will be. Servers that you buy from now on should put you on course to grow your capacity, or to ready yourself for an overnight recovery, while you gently apply the brakes by reducing your costs now.

If that's too wishy-washy for you, I'll give you a hard example: A copy of Windows Server 2008 costs the same for a one-socket, four-way server as it does for an eight-socket, 32-way server. Each unit of Windows Server 2008 carries a license that permits the operation of an unlimited number of Windows virtual machines on one physical server. Today, expanding Windows server capacity means buying more servers, and therefore more Windows licenses. It may be that you have so many servers that a volume license, as costly as it is, is cheaper or more convenient than one license per server. Using any Opteron scale-up scenario, one Windows license covers all the cores and virtual servers you can squeeze into one physical box. As a bonus, any variety of distributed computing is done faster on scale-up hardware because far more server-to-server communication is handled at the speed of memory rather than the speed of Ethernet.

That scenario can be carried further. When you get to know Opteron, especially the quad-core Opteron CPU nicknamed Barcelona (revision B, with the TLB flaw repaired, is now shipping), I'll explain how AMD's redesign of the x86 architecture not only scales up through added components, but scales up through evolved software as well. There are many more features in quad-core Opteron than generic x86 and x64 operating systems use. You will scale up your quad-core Opteron servers merely by installing a Windows or Linux point release that includes Opteron-specific optimizations, or changing the architectural target of the projects you compile in-house. I realize that my strong position on Opteron and desktop derivatives, like the amazing Phenom, might appear to some like bias. Please understand that when I dig into AMD CPUs and platforms as technology and foundation for IT strategy and investment, I simply see so many changes for the better.

Posted by Tom Yager on March 26, 2008 03:00 AM



March 04, 2008 | Comments: (0)

PCs approach Mac simplicity, courtesy of AMD

It takes a chipmaker to make PCs as easy to set up and operate as Macs, and AMD's going to do it

If the reality of the "standardized PC" were aligned with the rhetoric, no PC would ship with a separate driver disc. Windows XP would install onto a blank hard drive in the time it takes to copy the files. There would be no Found New Hardware Wizard, and if you inherited a PC with no discs or documentation, you could be certain that a store-bought Windows Vista DVD would be the only thing you'd need to make it work.

AMD, Vista, Mac
That's the reality for every modern-era Mac. A used Mac, plus nothing but a generic copy of Leopard, is a working computer. On that Mac's first connection to the Internet, all of that specific model's latest device drivers and firmware are downloaded and installed in one hands-off operation. Surely, if someone were given a chance to lay out the requirements for a PC standard from scratch, this sort of simplicity would be among them.

PC users can have computers that install from scratch with generic Vista or Windows media. If you knew that essential device drivers were on all Microsoft's install discs, and that all system drivers could be updated any time with a single download, that'd feel more like the sort of standard you'd expect. I was pleased to find that a major piece of the bridge to this future recently fell into place.

I just took delivery on a box containing a reference system for AMD's new Cartwheel (780G series) desktop platform. Inside an unnecessarily large, black, desk-side chassis was a system built around a very green (2.5GHz, 45 watt) dual-core AMD Athlon X2 4800 CPU. This system is what I now demand all desktops to be when I'm not racing them: Silent. But to my point about standard platforms: All systems built on AMD's Cartwheel, regardless of vendor, will use an identical bundle of device drivers for CPU, core logic, internal and external SATA disk controller, RAID, Ethernet, multi-display 3-D accelerated graphics (DirectX 10 compatible), DVD/Blu-Ray/HD-DVD decoding, and USB 2.0. Any system based on Cartwheel runs Vista out of the box with the drivers Microsoft put on the disc, and runs fully optimized after one trip to AMD's Web site to download the latest driver bundle.

The problem with most attempts at platforms is that they are inflexible. For example, Intel can claim that its chipsets' benefits overlap with AMD's, but Intel's chipset-integrated graphics are barely adequate for text, much less 3-D. AMD played the trump card of engineers from graphics chipmaker ATI, so that even the least of the Cartwheel desktops will still be able to play HD and Blu-Ray DVDs, along with HD content, games, and, oh yes, Vista. While Cartwheel will get this done and establish lower price points doing it, it has another advantage that Intel lacks. For those users and system makers wanting more 3-D kick from Cartwheel than the 780G integrated graphics provide, AMD offers the unique option of Hybrid Graphics: You can add an AMD/ATI discrete 3-D graphics accelerator, ranging in power and price from bargain bin to barnburner, to your system, and when running Vista, Cartwheel systems will use the combined rendering power of integrated and discrete GPUs (graphics processing units). Even with Hybrid Graphics, the platform still uses one set of drivers common to all implementations, downloadable from AMD.

The Cartwheel desktop platform will have a Puma counterpart for notebooks, extending the reach of AMD's consistent, unified PC platform to all clients. Is this certain to carry buyers of AMD 780G systems toward Mac-like simplicity? There are a couple of major bumps in that road. One is the BIOS. Each PC maker contracts out the initial and continued development of its systems' boot firmware and arranges distribution to customers. As long as a user can be cornered into having to flash his PC's BIOS to get an OS loaded, no PC can claim to be as easy to deploy as a Mac. The other limitation is audio. Audio is not part of the Cartwheel/Puma platform, so neither AMD nor users can predict which one of many digital audio chips their system will use. Audio drivers are often missing from Windows install discs, forcing you to find them on vendor-supplied media or on the vendor's Web site.

I can still see a day when an AMD platform-based PC will boot from a Microsoft install disc, connect to AMD.com, automatically identify and download the latest unified drivers, and come to life as a fully optimized PC, all without the user's intervention. That's as it should be, and as I've said, I think that AMD is the only outfit that could pull this off. Until then, customers who buy AMD 780G platforms from whatever system makers they choose will find that their CPU, core logic (chipset), and graphics device drivers are developed and maintained by, and downloadable from, AMD. That is a major step forward.

Posted by Tom Yager on March 4, 2008 06:17 PM



December 12, 2007 | Comments: (0)

Bad luck has AMD cowering

Just when AMD had its swagger on, it turned common bad luck into a full-fledged stumble

Bad luck for AMDA recent analyst quip from a widely distributed story on AMD's chip delays included a non sequitur parting shot that would have made me sick if it weren't so patently ridiculous. The gentleman said that AMD had not shown much innovation of late. I can only presume that "of late" referred to the preceding weekend. It is yet another shining example of an analyst, aided by a press that quotes them as a substitute for doing their own homework, burying a year's worth of breakthroughs with a teaspoon's worth of dirt.

Of course, timing is everything. That analyst wouldn't have won the race to be the last and loudest voice of the year if he hadn't encouraged buyers and (wink, wink) investors to join him on his trip down short-term memory lane.

AMD has had the kind of bad luck that just happens in all sorts of endeavors, and is common to all players in the semiconductor industry. AMD will miss a couple of narrowly defined targets for broad commercial availability of server and desktop CPUs. AMD also identified a flaw, an erratum in industry-speak, affecting a CPU unit known as the translation look-aside buffer (TLB). AMD has issued a microcode patch to OEMs, just as Intel did earlier this year when it filed an erratum on the TLB in Core 2 and Xeon CPUs. End-users won't feel it, it won't cost AMD any OEM wins, and AMD will have a strong position in Q1 '08, where Intel has all eyes focused.

Intel is no stranger to getting the fuzzy end of it from analysts. Intel's infamous F00F bug, so named for a gibberish opcode sequence that caused the CPU to halt until a hard reset, persisted through multiple generations of Pentium CPUs. It affected no one, but along with a benign flaw related to floating point divides, it put Intel on the defensive and slowed its entry into a commercial market then dominated by RISC, Unix, and other proprietary, purpose-specific platforms. Intel was derided as a toymaker, a partner with Microsoft in the making of the "peecee," which would never be taken seriously -- until it was, in which case the mighty market shapers knew it all along. A player is either the shining light or languishing in the shadows.

I'm referring only to the agenda-setting that lands analysts' thumb on the scale that puts the stock market at odds with what's happening in the real market. Penryn is quite advanced stuff, with a process shrink and a Hafnium dielectric delivering lower power consumption, but it does not wipe out Phenom, which takes its power savings from a process shrink and active, automatic power management that far exceeds the capabilities of Intel's microarchitecture. AMD extended enormous power benefits to its new chip sets, which have had an industry-first process shrink to 55 nanometers, as well as to ATI's new discrete GPUs (graphics processing units), which spit nails when they need to and nap when they can. And on and on -- just re-read my last two Ahead of the Curve posts. At the very least, Phenom and Penryn will come out even, and in total system power consumption, AMD's more efficient chip sets will put it in the lead. Penryn, and the analyst noisemaking about the death blows of AMD's delayed deliveries, does not make Phenom, Spider, or Barcelona go away.

But you wouldn't know this by watching AMD's marketing. AMD empowers its critics by overreacting to remarks that would be shrugged off by the market if it weren't so afraid of spooking investors. Apple has made a very good living by suffering in silence the various barrages of Nerf missiles fired at it by naysaying analysts grasping for influence. AMD is in danger of retreating from the strongest position it's had since the company was formed.

Spider is a troubling case in point. I've lauded Spider not only as brilliant technology, the market's first standardized, affordable, high-performance desktop platform that includes industry-leading graphics, but as stellar marketing that could only be made in Canada. AMD handed ATI the reins for marketing its Phenom CPU, 7-series chip sets, and top-shelf ATI Radeon PCI Express 2.0 cards as a whole platform, with the mascot being a chrome spider that really sticks in your head -- smart, smart, smart, a trial balloon that met with enormous success. Or it would have if AMD had left it alone.

After Penryn hit and analysts subsequently took after AMD for short delivery delays, AMD pulled two legs from its Spider campaign by adding a banner to its Spider landing page for a "Black Edition" Athlon 64 dual-core CPU. Pull up the product page for the dual-core CPU and you'll see a tarantula and some market come-ons ("Do you dare?") that have none of ATI's signature, lusty panache that works every time. AMD overreacted to a challenge by falling back to a position that leaves everybody wondering what AMD's flagship is. Likewise, AMD is answering Barcelona critics by pointing out that dual-core Opterons are selling well. All true, but we really want to know what's coming. Intel spent an entire year living in the future. AMD shouldn't answer that by spinning its greatest hits.

I know that it's all about investors, and AMD is looking for positives to offset an overlap of bad luck and a competitor's high-profile product debut. Get mean, guys. Intel went to Hafnium and process shrink as shortcuts to saving power, and the only place it can go from here is to shrink process again. AMD retooled its microarchitecture with independently clocked cores and split power planes, and it built chip sets that double the bandwidth of I/O buses while vastly reducing whole-system (not just CPU) heat and power consumption. Phenom was architected with the die space, three-level cache, and bus/core/unit power management architecture that will carry it to eight cores with a matching power envelope. It's a no-brainer. Bragging about the future that Phenom makes possible, making a fuss about the "tock" that's built into Phenom, won't kill sales for quad- and triple-core Phenom. Phenom has nothing to fear from Penryn, and Spider is Phenom's best and most compelling showcase.

And AMD, please reverse your decision to dilute Spider. Bringing the best of AMD and ATI together creates anticipation that Penryn can't overcome. Keep Spider fresh and nasty, and buyers won't care about a short wait.

Posted by Tom Yager on December 12, 2007 03:00 AM



December 05, 2007 | Comments: (0)

The spider and the tick

Intel's strategic mascot, the tick, fares no better against the spider in technology than it does in nature

AMD Spider eats Intel's tickWith the writers strike forcing sitcoms into reruns, my family has been forced to explore the entertainment value of learning. Take, for example, G-rated television programs that give viewers an unflinching look at the realities of the circle of life. One nature program offering a striking high-definition catalog of the invisible world among the weeds and reeds started its segment on spiders by saying, "Unlike their cousin the tick, spiders are endlessly fascinating, not only for their beauty and grace, but also for their rapid evolutionary adaptation to the changing world they inhabit."

I was so outraged that I stood and turned off the TV from the button in the front. It was bad enough that I was confronted by the momentary image of a bloated 52-inch tick (measured diagonally), but to be told that ticks and spiders share a family tree? It looks like somebody's been looking to Wikipedia for their science research.

It's true. No less an authority than the Dictionary app in OS X Leopard explains that the tick is a member of the arachnid family. Every time I see a spider, I tell it that I can only imagine the shame it must feel now that its awful secret is out. But after a moment's thought, I can imagine the spider that I pity giving me an eight-eyed wink. The tick's lack of interest in evolution has given the spider an ideal means to cope with what might otherwise be an awful truth. Not wishing to be too graphic, let's just say that a spider tolerates a visiting relative from the unfortunate branch of the family, but the spider doesn't tolerate it for long.

The tick bites, sucks, bites, sucks, in a never-ending cycle that seems to inspire its name, and this brought to mind Intel's celebration of 2008 as a tick year in its tick-tock strategy of bringing out fresh, or what the press will accept as such, processor technology every other year. Intel's Year of the Tick will coincide with AMD's Year of the Spider, and I couldn't look at this juxtaposition of marketing phraseology and not think of its parallels in nature.

AMD's Spider is, as I've written, the chipmaker's first complete platform. That's an area that observers cede to Intel. Being the single-source supplier for the guts of rubber-stamped PCs has been Intel's stock in trade reaching back as far as one's memory can stretch, but an uninspired sameness dominates recent years, painting a clear picture of a company that sees no need to evolve. Actually, Intel saw that need exactly once. In that case, nature used AMD as its agent of balance, and Intel's instinct led it to evolve by reverting to a prior simple and more survivable CPU design.

AMD took the Spider platform to a level of completeness, of total performance and total power efficiency, that Intel can't reach with this tick or the next. Those giving Spider even a shallow look will see world-beating 3-D graphics as AMD's platform checkmate over Intel. But others will point out, and rightly so, that the full Spider platform will be a relative rarity among PCs on shelves and in catalogs, primarily because discrete desktop graphics cards, and their onboard equivalent in notebook designs, are shrinking in popularity compared to cheaper integrated graphics. That's a pity; without discrete graphics, you don't know what you're missing. Apple knows that, which explains why Apple doesn't sell any desktops with Intel's integrated graphics. Apple bought discrete 3-D graphics processing units for iMac from the same vendor that AMD used for Spider: ATI (now part of AMD, of course).

The Spider brand isn't one that AMD is likely to extend beyond the ultra-fast enthusiast platform that it used to introduce the Phenom quad-core CPU and AMD 7-series chipsets. The "Spider" badge won't play well in IT, so when new-era AMD desktops and notebooks come your way, they'll be branded Phenom, and as I'll explain over the next few weeks, what distinguishes Spider from Intel's 2008 tick platform doesn't fall away when you cast off Spider's enthusiast trappings of CPU and bus overclocking and ATI CrossFire four-slot, PCI Express 2.0, 3-D graphics. Spider's beauty lies in its adaptable, efficient AMD Phenom CPU and 2-series chipsets. It will take some time for the relevance of Phenom -- that it's more than a half-advance of the technological second hand -- to reach users below the enthusiast level, people who are, most likely, like you.

A Spider by any other name is still an awe-inspiring creature, and no matter what you call it, you have something that is as merciless as it is beautiful. Am I stretching the metaphor too far to point out that unlike elsewhere in nature, there is never a race or a battle between spider and prey, and that the spider's limitless patience always pays off? Perhaps. But with AMD and Intel, the outcome is just as predictable as any face-off between tick and spider.

Posted by Tom Yager on December 5, 2007 03:00 AM



November 28, 2007 | Comments: (0)

AMD Spider weaves its own worldwide web

AMD releases mutant Spiders into the wild. Invite them in and feed them lots of Core 2

I've been alerted that satellites are tracking a massive Spider riding in with a Canadian cold front, and a plot of its trajectory has it reaching my address tomorrow morning. I am told that it's pointless to try to stop it. I must let it in and watch a horrific scene play out: Everything here with an Intel logo on it will fling itself at the invader, cocksure of victory, but will end up writhing in an impenetrable web, stunned and wrapped to be made a meal at Spider's whim. Me, I'm not squeamish. I love witnessing nature's constant work to maintain balance, the circle of life and all that.

Spider_tuning_expert_Sm.jpg

I haven't been on genuine pins and needles over the impending arrival of a new system for a long time, but I'm all a-tingle over a beast of an eval unit that's supposed to hit my doorstep tomorrow. When AMD acquired ATI, the very first thought in my head was that AMD would stage a triumphant return to the total platform — CPU plus chipset — business. On Nov. 19, it finally happened. AMD paired its new Phenom 64-bit, quad-core, single-socket CPUs with AMD/ATI jointly designed 7-series chip sets to create the Spider platform. That name makes for fetching marketing artwork, but it's also descriptive: Spider is agile on any terrain, quick to react, and yet still as a statue when there's no work to be done. And thanks to ATI, it has exceptional vision.

The Phenom CPU is not, as prior AMD top-end client processors have been, a lite edition of AMD's latest server CPU. When I got my first NDA briefing on Phenom this spring, I voiced my wish that some of the new Phenom CPU's advanced power management and performance-scaling features had made it into Barcelona. It would have handily put to rest this aggravating myth that Xeon and Barcelona are equals.

For starters, Phenom is AMD's first 65-nanometer part. Instead of using the extra die space and the smaller transistors to go ape on cache and clock speed as Intel is constantly compelled to do, Phenom takes a more conservative approach. Like Barcelona, Phenom uses a three-level cache architecture: Each core has its own 128KB Level 1 cache and 512KB Level 2 cache, and four cores share a 2MB Level 3 cache. AMD made empty space on the die with the process shrink from 90 nanometers, but it didn't use that space for cache. So how will AMD use it? Come on, use your imagination.

I know that a minority of Ahead of the Curve readers are proper gearheads, so this isn't the venue for a deep dive on the Phenom CPU's features. Know, however, that Phenom and I have been close company since June; my diary is packed, and I'll give you the key well before the year's out.

Spider is ostensibly aimed at enthusiasts, in which category I certainly qualify, and 3-D gamers looking for the ultimate cinematic experience. Fully built out, Spider is Phenom (the quad-core AMD 9000-series CPUs) plus AMD's 7-series chip sets and ATI's next-generation discrete graphics cards. As I see it, a fast CPU without a discrete GPU (graphics processing unit) is a very sad thing. The HyperTransport 3.0 bus is twice as fast as the HT bus in all existing AMD client and server machines. HT 3.0's scalability is one of many aspects of Phenom's brilliant power equation that includes independent power control of each core. Spider accommodates DDR2 RAM running at up to 1,066MHz, with a road map for DDR3. For those who skipped my class on the subject, DDR2 consumes about half the power of Intel's FB-DIMM.

Spider gives the truly power-hungry something they'll never see from Intel: manual power and performance management. For performance fiends, that means overclocking. Contrary to purpose, I use these utilities to underclock, to crank power down as low as it can go without putting the machine completely to sleep. Spider's (over)clocking utility integrates GPU performance control into the same tool; AMD's marriage to ATI is clearly working out nicely. For the less savvy who want to squeeze the absolute safe maximum performance out of their unique total system configuration, the tuning utility has an automatic mode. Start it, let the system sit for a few hours, and you will come back to a setup that will run at the absolute maximum safe speed. Your cooling fans will roar, but your machine will smoke, and only figuratively.

When AMD uses such catchwords as "enthusiast" and "gamer," I also see blindingly fast, affordable, and power-efficient one-socket workstations that are zero-latency responsive for interactive tasks, and which have two definitions for the term "idle": Either it goes into an ultra-low-power sleep, or it kicks into overdrive and grinds like a madman. We'll see Phenom in notebooks. I see it in blades and in servers that occupy a quarter of a rack unit. I don't have to look to Phenom's future to get excited about it. Spider already has me in its clutches.

Posted by Tom Yager on November 28, 2007 03:00 AM



September 19, 2007 | Comments: (0)

AMD leads by listening

AMD put software partners and system manufacturers back in charge of the x86 agenda

AMD x86AMD has taken great care to date to make sure that Opteron CPUs and system platforms, and the high-end desktop platforms that are derived from Opteron, aren't seen by OEMs and ISVs (independent software vendors) as requiring any special treatment. In years past, AMD has encouraged me to test Opteron using Intel's compilers, reinforcing the message that AMD does exactly what Intel does, only faster, and in some cases, at a lower cost. With Barcelona, AMD was adamant that I not use Intel's compilers. AMD prefers The Portland Group's compilers, but failing that, AMD would like to see me use the GNU 4.2 open source tool chain, which has never been recognized as a producer of thoroughly optimized code. That's the first time any hardware vendor has sent me to GNU for performance tests. What gives?

Intel's not setting AMD's agenda any more. Intel's compilers no longer produce the fastest Opteron code by virtue of Opteron's hewing to the least capable platform standard. AMD has outgrown Intel. Hardware and software vendors that utilize AMD platforms are now steering AMD's strategy. AMD is all about giving OEMs and ISVs what they want, and that's precisely the approach that originally put Intel on top.

I've always pressured AMD to evangelize to ISVs to get them to optimize for Opteron. Margaret Lewis, AMD's Director of Commercial Solutions, manages ISV relationships and developer programs for AMD. She thinks it won't work to push ISVs into optimizing for Barcelona, even though that effort would pay handsome dividends for software vendors in terms of differentiation. Instead, Margaret is looking to Barcelona to "get [AMD] a seat at the grown-ups' table." She wants AMD and Intel seen as being on "an even keel." That kind of talk has always made me tense up. It seems like AMD is determined to hide its light under a bushel basket.

I've been looking at it all wrong. Getting ISVs to optimize for AMD is backward. AMD is optimizing its hardware to meet ISVs' and OEMs' requirements and fantasies, and that's an approach with a history of success.

The grown-ups' table to which Margaret Lewis refers is where agendas are set, where multi-billion dollar, forward-looking strategies are shaped. It's where Microsoft, Novell, Red Hat, IBM, Sun, Apple, VMware, Xen, GNU, and the rest of that tiny number of influential players sit. Ever since the 80386, Intel has been at the head of that table.

Intel used to be a fantastic listener, even though it took its feedback from only one source. Intel's x86 chips, right down to the instruction set, evolved almost entirely on insight derived from a commercial market that kept saying, "We might jump from RISC to x86 if only Microsoft would ..." Intel and Microsoft paired to knock down objections. In my view, Pentium II nailed it, Intel nailed it and customers started bringing Windows into server roles. Make no mistake: Intel and Microsoft created the commercial x86 market, and they did it by working closely together. That is a model for success.

Intel misinterpreted its market dominance to mean that it no longer served the will of its partners. Intel forgot how to listen. The clearest evidence of this is in Intel's "tick tock" hardware updates, with microarchitecture overhauls and speed tweaks happening on alternating years. Tick tock fits no one's strategic objectives but those of Intel, analysts, and those of its shareholders who, like Intel, see the commercial systems market as one in which Intel sets the pace. All they see is Intel forcing system buyers back to the table every two years. That's not in anyone's interest; in private, even system manufacturers admit that they're not wild about the idea. CTO Phil Hester impressed me with the lesson of bringing new technology to market only when customers can feel it. My error is in failing to keep in mind who AMD means when it uses the word "customer." Fortunately, AMD is more focused.

For Barcelona, AMD went back to the major players in PC and enterprise computing, the big guns in systems and software that have been dancing to Intel's drumbeat for so long, to ask them "so, what do you want?" If anything has slowed the pace of uptake of the Opteron platform, it is that ISVs and OEMs aren't yet accustomed to the idea of being asked what they want. They're used to scrambling to be first to support new chip features marketed by Intel. I think that AMD was heartened by the first answer it got to its question: "We're all agreed that we don't want the disruption of a new architecture every other year for the sake of keeping a marketing-driven schedule." Then ISVs and OEMs opened up and began talking about what they do want, and the first product of that ongoing interaction is Barcelona.

For example, Barcelona's headline feature, power management, springs from a desire among system software vendors and OEMs not to get stuck managing power in ways that change with every tick in the microarchitecture. Barcelona's power conservation is, using AMD's words, fire and forget. The OS doesn't have to track load and tell the platform when to throttle up or down. It's all automatic, and as AMD gets smarter at it, systems will get more power-efficient whether the OS manages power or not. Another requested feature is 128-bit floating point. It's nice to have SSE (streaming single instruction, multiple data (SIMD) extensions) around, but it'd also be great if apps that need faster and more precise floating point could get it without being rewritten to use SSE for all of their math. Nested Page Tables, marketed by AMD as Rapid Virtualization Indexing, is another request from major partners who see virtualization as the way forward.

In the transition from Opteron to Barcelona, AMD has established a track record of being responsive to the needs of OEMs and ISVs. AMD has taken over the lesson that Intel, in its complacency, forgot: CPUs and system platforms live to serve software. AMD won't tick tock along with Intel. Instead, it will march to the drumbeat of IBM, Microsoft, Novell, Red Hat, Sun, and the handful of others who are probably a bit shocked to see so much of what they asked for in Barcelona, and who look to AMD to continue to architect hardware based on their requirements. Since these major players are all competing by doing better than others at furthering their customers' objectives, AMD's approach gives IT and commercial system buyers the loudest voice of all.

Posted by Tom Yager on September 19, 2007 03:00 AM



September 18, 2007 | Comments: (0)

IDF moves: Does Intel have the guts?

Intel has the power to create the strongest x86 server market yet seen. Does it have the nerve?

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Intel Developer Forum (IDF) is an unusual show. It gathers software and hardware engineers around a microprocessor core for a commodity instruction set. A cynic might liken it to a bi-yearly salt convention.

Sure, Xscale and Itanium show at IDF, and both of these architectures deserve more attention than the media or Intel gives them, but let there be no question: IDF is about x86. Not just any x86, but Intel's. And at this fall's show, it's not just about Intel's x86, but Intel's 2008 x86. Intel sees '08 as an election year, and September's IDF is about rallying the electorate around its agenda.

To press the political analogy a bit further, Intel sees itself as a candidate running unopposed. Intel wants the 2008 Intel/AMD election reduced to a pro forma exercise. IT always welcomes one less thing to worry about, so there are quarters where Intel’s true message, "the obvious choice," resonates.

Smart people in IT, however, are genuinely weighing their options. Interoperability across the leading architectures has reached new heights, including Solaris and AIX on RISC; Windows and HP-UX on Itanium; and OS X, Windows, Solaris, and Linux on x86. Middleware and distributed architectures are transparently bridging platform gaps so that the best matches can be made case-by-case. The only obvious choice is to limit the careers of "deciders" who, when given dynamic objectives to meet, cling to their technology selection without due consideration.

At present, the best fit for dynamic objectives is Quad-Core Opteron, AMD’s brand new chip for servers with two to eight sockets. Intel's tacit acceptance of AMD’s superior design can be seen in the reactive engineering and positioning invested in 7300 series Xeon MP, Intel's quad-core CPU for four socket servers. Intel's quad-core Xeon was loaded with promise but delivered less than expected.

Intel's Dedicated High Speed Interconnect was to be the point-to-point bus between processors that would beat AMD’s Direct Connect Hypertransport intra-processor bus. Instead, Intel hooks Xeon MP 7300 processors together the way it always has, indirectly, through the north bridge chip, the same chip that handles all memory and I/O traffic for the system. Intel's Snoop Filter, a 64 megabyte lookup table into which all processor busses feed, is Intel's stopgap for the absence of Level 2 cache coherency that AMD has built into Direct Connect.

Xeon MP has no answer for Quad-Core Opteron's Level 3 cache -- just a larger, shared, Level 2 cache that's external to the CPU cores. Intel promoted that it would combine four cores onto a single die (one contiguous surface) for Xeon MP, as AMD does for Quad-Core Opteron. But in the end, Xeon MP 7300 stuck with Core 2's design of separate pieces linked together by lengthy, complex buses that are shared by multiple processors and that often serve multiple functions. I can't envision how sixteen Xeon MP 7300 cores would work efficiently with the touted 256GB of RAM, given that all cores and sockets have to share an off-chip memory and I/O controller.

Intel missed its targets, then had Marketing scramble to paint bull's-eyes where each wayward arrow fell. The list of promises not delivered, or half-delivered, with Xeon MP 7300 raises reasonable doubts about how Intel's grander plans for 2008 will actually pan out. Intel has simple strategies for next year: Co-opt AMD's on-chip memory and bus controller; do genuine point-to-point CPU and subsystem interconnects as AMD has done; put multiple cores on one contiguous wafer; and bring Hyper Threading back into the picture. Let's call it an Opteranium. If Intel actually pulled this off, 2008 would be a banner year for x86 on all fronts, with two chipmakers putting forth their greatest advances to date.

A changed game is inevitable for Intel in 2008. What's in question is whether Intel will play a role in changing it. Intel has had high-speed I/O bus work underway for years -- it just hasn't found its way into Intel's mainstream designs. There's been no point in trying. To make a high-speed bus worth using, the bus controller would have to be on the CPU. 2008 is supposed to be the year that happens, and when you pull the memory controller onto the CPU as well, you've got something that might scale.

One unique technology that Intel might bring to the game is Hyper Threading (HT). Intel bailed on this accelerated context-switching technology after one try, and Intel advised against HT's use in servers because of the potential for decreased performance. We now know that threads are good, and the monolithic server applications that might have suffered under Hyper Threading are rare. Sun's Niagara processors, UltraSparc T-1 and T-2, are monstrously multithreaded single-socket server chips, and T-2 takes home floating-point benchmark trophies at just 1.7 GHz. Even Java loves threads, and I'm impatient for Hyper Threading's return.

If Intel does one-up its rival next year, it will be a welcome turn of the tables. The fire would be lit under AMD for a change, and we'd discover what AMD is capable of when tasked to the limits of its capabilities. Better still, if Intel actually had something on AMD, perhaps it would start marketing along the lines of "look what we've got that they haven't got," and IT would start looking at those seemingly minute details that add up to more virtual machines per CPU, higher total server throughput, and lower full-system power consumption. These are advantages that AMD owns but that too few recognize because of an aversion to detail.

If Intel wants to change the game in 2008, it can start by burying the buzzwords, bringing out the facts, and fighting the fight in engineering instead of marketing. When technology swings decisions, chipmakers are driven to their highest potential. Buyers will pay more for that, so there's no need to let competition devolve into a price war. Have Marketing sit out; let the engineers play. That's how to change the game in 2008.

Posted by Tom Yager on September 18, 2007 03:00 AM



September 12, 2007 | Comments: (0)

Battle of the chip giants: Comparing AMD's Quad-Core Opteron with Intel's Xeon 7300 MP

Here's why you should care about the difference between Intel and AMD bus architectures

I should be writing about Quad-Core Opteron, which was formally launched on Monday, but I feel the need to take a brief detour into a point-by-point contrast between AMD's latest offering and Intel's new quad-core Xeon MP 7300-series CPU. The MP designates the CPU for use in four-socket servers, which brings up the first difference between Opteron and Xeon MP: Opteron scales up to eight sockets.

Intel certainly grabs your attention with its boast that quad-core Xeon 7300 performs at a nice, round 2X the speed of "prior generation" Xeon MP, yet reduces power consumption. The prior generation turns out to be Xeon 7100 MP, a dual-core CPU built with fatter transistors. Quad-core and process shrink brought Intel to the finish line. This muddy messaging doesn't go over the heads of IT buyers, but X factors do get us press types excited.

It turns out that Quad-Core Opteron is more than two times faster than its dual-core predecessor, and Quad-Core Opteron saves power not through process shrink, but by turning off or dimming the lights on walkways and in individual rooms that aren't being used. The walkway is the memory bus on each CPU, and each CPU is a suite with many rooms: four cores, the floating-point unit within each core, the top 64 bits of a floating-point unit within a core, and so on. Quad-Core Opteron checks which rooms are occupied roughly 2 billion times per second without any help from the OS.

Intel's new DHSI (Dedicated High Speed Interconnect) shifts the bottleneck in the connection between the CPUs and the north bridge (the external memory and I/O controller shared by all four CPUs) to the inside of the north bridge chip; picture four hoses feeding into a $10 lawn sprinkler. Intel's assignation for this topology is point-to-point.

AMD's Direct Connect offers a different take on point-to-point. Print out a picture of any eight-socket Opteron motherboard. Now draw a line between any two sockets, then from any socket to any of four banks of memory adjacent to each socket, and repeat this exercise until your hand gets tired. All of those lines can carry on simultaneous conversations because Opteron has no north bridge that forces the least pleasant variety of convergence.

How can I make you care about the difference between Intel and AMD bus architectures? It really depends on your workload. If you run four or fewer processes of 8MB or less on your Xeon MP server, then you're good to go. Otherwise, Opteron will prove more scalable.

Intel has raised the 7300 chipset's maximum memory capacity to 256GB: a quarter terabyte, 16 cores, and one chip handling all the transfers.

Finally, with regard to the virtualization enhancements in quad-core Xeon 7300, Intel's contribution is external to the CPU. A chipset facility, VT-d (Virtualization Technology for Directed I/O), transparently routes DMA (direct memory access) traffic between peripherals, such as disk and network controllers, and virtual machines. VT-d lets I/O bypass the CPU, OS, and virtualization software.

AMD has published its spec for an IOMMU (I/O memory management unit) that will serve an identical purpose, but AMD's IOMMU was not realized in Quad-Core Opteron. Intel scores a legitimate win with VT-d, and I can attest that it is the one enhancement that all virtualization solution vendors wanted most. Quad-Core Opteron does implement a DEV (Device Exclusion Vector) facility that blocks access to a peripheral if a virtual machine is not authorized to use it. Seen another way, the DEV could be used to grant safe, exclusive peripheral access to a single VM. That's short of an IOMMU, but it would relieve some of the software burden of linking devices to virtual machines.

Intel's VT-d holds the promise of virtual machines that have near-native I/O performance for asynchronous devices, but it has a practical limit to its scalability. If you pack a Xeon 7300 with its maximum 256GB of memory, then carve that into 32 spacious virtual machines, you can't give each VM its own 10 Gigabit Ethernet card. I can see VT-d consolidating two Oracle servers into a single Xeon server, giving each VM the physical peripherals it had as a discrete server, without a drop in I/O performance.

If you want maximum virtual machine density, or you're running a server that's virtualizing desktops or performing streaming operations that call for low-latency switching between virtual machines, that's AMD's forte.

AMD's Rapid Virtualization Indexing restructures a server's virtual-to-physical memory map with every "world switch" from one virtual machine to another. This is a trick that virtualization solutions must currently perform in software, adding significant latency to the period between virtual machine switches. Rapid Virtualization Indexing reduces the process of loading and saving virtual memory maps to one step that's handled directly by the CPU. All the virtualization software needs to do is tell Quad-Core Opteron which virtual machine ID is about to take control, and it's done.

Posted by Tom Yager on September 12, 2007 03:00 AM



September 10, 2007 | Comments: (0)

AMD's $389 big iron

For the past year, I've been immersed in research on server microprocessor and system architectures. There have been genuine breakthroughs on so many fronts. IBM's POWER6 is built around 4.7 GHz processor cores that outpace the latest Itanium in single-core performance, while advancing POWER simultaneously toward power efficiency and mainframe functionality. POWER6 is able to adjust the power utilization of CPU and core sub-components with each clock cycle, and it does so based on its own analysis of computing and I/O load rather than the operating system's. Sun's UltraSPARC T2 proves that by focusing on total throughput, a one-socket server with a comparatively low clock speed can rival, and even outperform larger, more costly, more power hungry servers. IBM and Sun put the lie to notions about RISC having run its course.

I've never seen as much new, exciting and remarkable technology emerge from microprocessor chipmakers as I've seen in the past twelve months. I've never seen computing's goalposts moved so far in such a short span of time.

For most of a year, I've also been deep in learning about AMD's new server CPU architecture, Barcelona, which makes its debut today, 9/10/07, as quad-core Opteron. I've experienced Barcelona as PowerPoint decks, block diagrams, chip masks, and discussions with AMD's CTO, engineers and Fellows. Those technical discussions weren't accompanied by remarks about Intel. AMD was bearing down on AMD's best to date. I believe that I have as deep a conceptual understanding of Barcelona as any non-engineer outside AMD, and the more I learned, the more convinced I was that I was looking at a mind-blowing architecture. Barcelona's design goals overlapped concepts executed by Sun and IBM while keeping the architecture 100 percent compatible with legacy ("standardized") x86. I developed grand expectations for Barcelona, but AMD cautioned me not to expect too much in the way of trouncing Intel in benchmarks. AMD's marketing played down the reach of Barcelona's redesign, but this didn't line up with what AMD's engineers were teaching me.

I laid my hands on Barcelona for the first time just three days ago in the form of a two-socket server with a pair of 2 GHz quad-core Opterons, model 2350. The details of that system and the results of my early testing will follow very shortly, but where Sun and IBM had me saying, "wow", "that's remarkable; who dreamed this up?" I looked at the details of Barcelona, wondering where AMD could make its mark in a field already filled with such beautiful engineering.

Now, sitting on the floor in front of Barcelona (by remote control), I am speechless. I'm running all eight cores, full-out, and watching a watt/ammeter keep a record. The evening started with an all-night burn in. During that burn-in, with all cores kicking at 100 percent, I didn't expect when I saw: 2 amps, measured at the outlet, or just 300 watts. When the workload dropped to idle the power utilization came in at 1.3 amps, or 149 watts. I continued with the testing proper, which is not yet in a state that permits me to share the results, and verified those results.

This is not a wimpily-configured box: 8 GB Registered ECC DRAM, on-CPU I/O, memory and SMP node controllers. There are two banks of RAM for each socket, and as I'll explain when I get to the results, each socket's shared third-level cache turned out to be a major win.

After all the tech magic worked by AMD, it's the price that got my blood boiling: $389! That's desktop chip money. So AMD is blazing trails in more ways than one.

It's Barcelona day, week, month, and who knows how long after that. I'm jazzed.

Posted by Tom Yager on September 10, 2007 06:43 AM



July 25, 2007 | Comments: (0)

In search of energy benchmarks

Efficiency has rocketed to the top in server purchasing criteria, but benchmarking has not left the launch pad30OPcurve_hp.jpg

I've been working on InfoWorld's power and cooling benchmark suite (I call them "Greenmark," but I haven't officially cleared that name's use) for several months. Why, you might wonder, haven't you seen any published Greenmark results in InfoWorld? Check out the comments thread following Ted Samson's Sustainable IT blog entry reporting Neal Nelson's tests showing that AMD is markedly superior to Intel in server power efficiency. It's remarkable how much emotion the commenters to Ted's blog invest in their arguments against Neal Nelson's findings. Some of these people skip technical objections and go straight after Nelson's reputation, alleging that AMD had purchased the positive outcome.

This seems an extreme reaction until you think about the impact that a headline like "AMD servers consume up to 44 percent less power than those based on Intel" can have. Energy-efficiency test reports will steer billions of dollars in IT spending and stock market investment over the next several years. One such headline this, run at an opportune time, can swing several points of market share over a period of several months, and if picked up by an analyst, a definitive finding such as Nelson's could have an immediate and substantial impact on a vendor's share price. I know that when InfoWorld's Test Center runs its first set of Greenmark results, there's a fair chance the vendor that finds itself in second place will launch a concerted effort to tear the tests, the reviewer, and the magazine apart. For that matter, the vendor itself might not need to lift a finger. Self-interest among shareholders and lesser investors in the chips and systems deemed less efficient can motivate a response more energetic and far-reaching than any that the vendor's marketing department could orchestrate. There is that much money at stake. The furor over Nelson's findings proves my point.

There's also a good deal of ass-covering there. Energy efficiency has rocketed to the top spot in server purchasing criteria. Management expects that everyone with input into server buying decisions has learned the ins and outs of power conservation, but there are some lazy IT folk who just fudge the rationale that justify major system purchases. Something like the Neal Nelson report can end up on the IT slacker's desk with a Post-It reading, "Server criteria review meeting today @ 10:00. Bring your energy-efficiency research notes."

The remarks in the Sustainable IT blog's comments thread barely hint at the firestorms that energy benchmarks will trigger once they become commonplace. It took real courage for Neal Nelson to take the first arrows along this trail. As for challenges to Nelson's objectivity and professionalism, I'll weigh in with the caveat that I won't be looking at Nelson's energy tests until I've finished developing my own. Neal Nelson has long experience and solid credentials in the performance testing business. It's been my experience that Nelson's organization creates fair and relevant tests, documents the process, makes itself accountable for the results, practices full disclosure, and responds to challenges to methodology and findings. A tester that provably meets those standards (and so very few do) earns the benefit of the doubt where integrity is concerned, and only test results published by independent testing organizations with a commitment to those standards can be taken seriously by investors of any stripe. Challenges to the tester's objectivity that aren't backed by direct proof of bad faith have to be ignored by those who develop tests and who use test results as criteria for purchases. That makes room for the kind of discussion that leads to better tests and to the wiser application of their results.

Posted by Tom Yager on July 25, 2007 03:00 AM



June 28, 2006 | Comments: (0)

Blue Pill is an attention-whoring non-threat, period

I can't believe I even have to address this.

The "Blue Pill" (BP) AMD Secure Virtual Machine (SVM) root exploit is a scam. It poses no threat to any PC secure from physical access and where administrative privileges are tightly controlled. There is no security hole in AMD's SVM implementation, and the method described by the hacker can be employed in exactly the same manner on an Intel CPU with Virtualization Technology (VT). What's more, the hacker's claim that BP cannot be discovered once it's in place is wishful hogwash. The very infection technique to which the hacker alludes (and that's all he does; there's no meat on those bones) can be used to discover and disarm the exploit.

The procedure that this hacker claims to have invented is lifted directly from AMD's Programmers Reference Manual. Any reader familiar with x86 assembly language and the PC boot sequence can hack his first baby hypervisor in a day or two. Baby hypervisor code samples abound on the 'Net, and BP is just one more. Luckily for us, this hacker promises not to release his very, very scary code sample into the wild until after his standing ovation at a hackers' convention in late July.

I don't care whether the hacker's male or female. As far as I'm concerned, all black hats are sexless in all regards.

BP might be a harmless case of "look at me! Ain't I bad?", but it also smacks of an effort to harm AMD's reputation and commerce. If that seems far-fetched, consider three things: The original post's date is just four days prior to Intel's first deliveries of Core Microarchitecture CPUs, Intel's first real competitors to Opteron. The post goes out of its way not to mention the fact that Intel CPUs with VT are designed to launch hypervisors using a nearly identical procedure. And the hacker discloses that he'll have nothing to show until late July, but, golly, he had to tell us right then, just before Woodcrest shipped, that there's proof that AMD's SVM is a major security hole.

What this hacker really set out to prove is that we're all gullible enough to take this bait and steer clear of AMD64. Get used to efforts to keep you misinformed. The anti-AMD FUD (fear, uncertainty, doubt) pump is just powering up.

Posted by Tom Yager on June 28, 2006 04:35 PM



September 19, 2005 | Comments: (0)

A welcome to AMD's new CTO, Phil Hester

Phil Hester, AMD's new Chief Technology Officer, is best known for running IBM's Personal Computing Division. But in my mind, equally relevant is his leadership in IBM's effort to derive a mass-market CPU from IBM's RS/6000 RISC system designs (which evolved into the POWER family of enterprise CPUs). The resulting derivative CPU architecture, PowerPC, is now a broadly licensed property and a first choice in embedded, automotive, aerospace, system management and application-specific integrated circuits (ASICs).

It should not escape your notice that Phil Hester brings to AMD insider experience with two of its chief competitors. IBM was at the top of Intel's OEM food chain, and Hester was one of the key players in managing that relationship. AMD is stepping up its presence in high-end embedded systems, and that's a segment in which PowerPC is particularly successful. That's not why AMD hired Hester, but he came through the door having earned his first years' salary if only in competitor intimidation. This man knows too much.

Hester is a newcomer to AMD's payroll, but not to AMD. After getting an early peek at AMD's Hammer project, Phil Hester co-founded Newisys, a start-up that produced extraordinarily well-designed, enterprise-grade Opteron rack servers for OEMs (original equipment manufacturers). My Newisys-made server is one of two machines--my Xserve G5 is the other--that I open periodically just to ogle their exquisite engineering.

Admittedly, I'm putting a lot on the shoulders of a man I know only by story and reputation. I'm hoping that my insight is accurate and that Phil Hester is someone to whom AMD's executives should defer on matters within his incredibly broad experience, and that reaches beyond AMD64 and AMD's unseen next-generation CPU, K9.

You see, AMD has a great story in commercial CPUs, but as a whole it is far from hitting on all cylinders. The company is neither broke nor broken, but the tally of AMD's unexploited assets and opportunities is substantial. Hester's credentials qualify him as something of a turnaround specialist, and AMD needs some turning around, or at least some turning.

Unless I miss my guess, Phil Hester's precisely the right guy for AMD's CTO post. And I don't usually miss my guesses. In any case, I extend my best wishes to AMD's outgoing CTO, Fred Weber, and to Phil Hester.

Posted by Tom Yager on September 19, 2005 04:23 PM



August 26, 2005 | Comments: (0)

AMD's big win, Carly's revenge, blocking the Sun

HP announced that it closed a 3-year deal to sell 1,000 workstations to Lucasfilm, Ltd. A 333 system per year sale to Bank of America wouldn't warrant a press release, but you can understand why this sale did. We're talking Yoda here, for Luke's sake.

This Lucasfilm deal, which is not AMD's first deal with George Lucas' film/videogame empire, was brought to AMD by HP's dual core, dual processor xw9300 workstation, a machine that has an identically-wrapped dual/dual Xeon counterpart, the xw8200. HP's model numbering scheme is arbitrary except that "Xeon plus 1,100" says something about HP's take on the pecking order. So does HP's decision to issue its release smack in the middle of Intel's signature event, Intel Developer Forum.

How big a deal is this deal? Not big, either in terms of units or dollars for HP or AMD. But it is a prestige win for both companies that will attract more interest from commercial prospects than sales to universities or rankings near the top of the supercomputing cluster leaderboard (HP sez, "in your face, Dell!").

Crowing about Opteron is also interesting in light of HP's alleged history. According to the anti-trust complaint that AMD filed against Intel, HP suffered the wrath of Lord Xeon after closing a maiden deal with AMD to equip HP desktops. You may have heard that said deal required AMD's gifting HP a million CPUs to assuage HP's fears that Intel would retaliate. AMD says that Intel proved HP's fears justified, and forced HP to bury its heathen desktops alive mere moments before they were to ship, and to disavow those few that clawed their way into the channel. If that really went down, it lost HP some money. There's a decent margin in desktops built with freebie CPUs.

HP hasn't exactly placed a cadre of its lawyers at Hector Ruiz's disposal, but HP is showing itself to be a friend of Intel's enemy, and we all know that the friend of your enemy is a very bad person.

With AMD's lawsuit edging ever nearer its first day in court, I can't help but see this cunningly-timed announcement as AMD and HP blowing a loud, wet executive raspberry in one-time best bud Intel's direction. But at least one media outlet chose to redact the "nyah" from HP's news. The San Francisco Chronicle resting outside my door on Wednesday ran a nice-sized story on the HP/Lucasfilm win on the front page of the business section, but the story, which included quotes from analysts, made no mention that the workstations were built on AMD's dual-core Opteron. Did the Chronicle fail to ask, did the analysts fail to mention it, or did someone decide that the Chronicle's readers wouldn't care?

For its part, HP thought that AMD was important enough to plant its CPU's moniker two paragraphs above the workstation's own in its press release. The release touts, in order, Lucasfilm, AMD Opteron, HP xw9300. I seriously doubt that HP demanded 1,000 free Opterons this time around.

In other news, HP's deposed chief Carly Fiorina has signed a deal for a new tell-all book due out next year. I wonder if she'll mention AMD, which I'm told she championed at some cost˜. Sun's promising Galaxy dual-core Opteron servers, whose "confidential" PDF presentation dropped its towel for long enough to give the whole world an eyeful, are due out in 3...2...1... Will coincidences never cease?

Posted by Tom Yager on August 26, 2005 05:28 PM



August 23, 2005 | Comments: (0)

Intel: Performance per what?

The keynote from Intel president and CEO Paul Otellini at Intel Developer Forum didn't offer much in the way of product news, but it did introduce a fresh obfuscatory term to the PC vendor vernacular: Performance per watt. Most technology buyers, including those in IT, don't know a watt from a kilometer. But those of us who are acquainted with the watt can't claim bragging rights, for so few of us know what on Earth a "performance" is when offered as a unit of measure.

You can't measure performance per watt (that's Intel's point), but you can make enough sense of the concept to know that it isn't Intel's strong suit now, and isn't likely to be next year.

Using what's shipping today as a point of reference, Intel's latest single-core 3.33 GHz Xeon MP is a 136 watt part for 2-way servers. You must add to this the power consumption of the chip set's north bridge controller, which provides the essential link between processors and memory, and between the processors themselves in a 2-way system.

AMD's Opteron 875 with a pair of 2.2 GHz CPU cores is rated at 95 watts, and it's an 8-way chip (sixteen cores per server max). There is no additional power burden for memory and inter-CPU traffic; independent controllers for these are built into each Opteron CPU.

To erase any doubt about AMD's power efficiency chops, it has 30 and 55 watt Opterons in its product line today. The power requirements for AMD CPUs will plunge when AMD moves to .65 nm. AMD also built PowerNow! power management into Opteron, an advantage that Xeon doesn't have.

If Intel succeeds in establishing performance per watt as a buying criteria, it's picking yet another fight with a competitor that's already an expert in server processor power efficiency. By this time next year, Intel's 80 watt dual-core Xeon, strapped to its power-sapping legacy bus and memory architecture, with subpar (relative to 2006 Opteron) dynamic power control, will be nothing to brag about.

Posted by Tom Yager on August 23, 2005 03:30 PM



July 20, 2005 | Comments: (0)

AMD v Intel: A look at AMD's subpoenas

32 head honchos in the computer industry arrived at work on the morning of June 28, 2005 to find overnight mail envelopes on their desks. AMD served papers on the manufacturers, distributors and resellers that it believes are best acquainted with Intel's allegedly anti-competitive skullduggery. I thought you might be interested in the list, along with a bit of background research and opinion. My fair market rating reflects the degree to which the OEM deviates from the pattern of keeping AMD's representation in its product line to 10 or 20 percent.

The whole list of 32 subpoenaed parties is a bit much to chew through in one sitting, so I'll give it to you in installments. This post covers Acer, Averatec, Dell and Fujitsu. Click below to view the whole story.

Acer
Perched near the top of the second tier, Acer delighted AMD with its Ferrari brand Athlon 64 Mobile notebook. Acer just rolled out the Ferrari 4000, a more businesslike reworking of the gamer-targeted Ferrari 3400 with a serious CPU and bus upgrade from Athlon 64 Mobile to Turion 64 Mobile. Acer is sold through authorized brick-and-mortar retailers, business-to-business catalogs like CDW and through wholesale distribution channels.
Fair market rating: Acceptable.Acer's product line features a decent mix of AMD-based systems in the notebook and consumer desktop categories. Acer has no AMD-based business desktops or servers.

Averatec
Respected second-tier notebook manufacturer with large product line targeting consumer and business segments. Athlon 64 Mobile and Athlon-based Tablet PC stand out at the higher end of Averatec's lineup. Well established in consumer retail, distribution, business-to-business and on-line channels.
Fair market rating: Exceptional. AMD dominates Averatec's lineup, but does not have an exclusive hold. If anyone from Intel came knocking, either Averatec didn't answer the door or it held AMD's feet to the fire for a better deal.

Dell
Poster child for Intel exclusivity. Dell is successful, every OEM wants to be like Dell, Dell blocks AMD from its product line, therefore, short-sighted OEMs conclude that the shortcut to high profits is to let Intel take you exclusive. Dell is sold only on-line, although it does operate an outlet store in Texas (elsewhere?) and has one unbranded desktop model that it sells to VARs. Remarkably, the price break we assume it's getting from Intel doesn't give Dell much price advantage over HP.
Fair market rating: Unacceptable. Dell keeps mentioning AMD in executive interviews to score free press and to keep Intel from taking its top cash cow for granted. I'm really disappointed with these guys; they used to be rebels.

Fujitsu
Everyone at AMD carries a Fujitsu Lifebook S2100 notebook, reflecting the hope that the S2100 was the start of a beautiful friendship. Nope. It's the last AMD-based notebook Fujitsu ever made. In a fat product line, Fujitsu has one AMD notebook, one AMD desktop, one AMD workstation and zero AMD servers. Itanium 2 is better represented in Fujitsu's line than Opteron, although Opteron graces Fujitsu's top-of-the-line workstation.
Fair market rating: Poor. AMD's representation in Fujitsu's product line is token and is a template for the Intel market control practices that the Japan Free Trade Commission found in violation of Japan's anti-monopoly statutes.

Posted by Tom Yager on July 20, 2005 01:28 PM



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